基于SAA7114H的图像无级缩放功能的实现  

Implementation of Image No-grade Scaling Based on SAA7114H

作　　者：徐小梅[1] 冯彬彬[1] 王珩[1] 

机构地区：[1]武汉数字工程研究所,武汉430074

出　　处：《舰船电子工程》2008年第7期162-165,共4页Ship Electronic Engineering

摘　　要：在实际工程应用中,对图像无级缩放功能的需求日益增多。由此,介绍一种已经在实际应用中得到验证的图像无级缩放功能的实现方案。该方案通过对单片机的控制,完成解码器SAA7114H和其他器件之间的I2C总线通讯,同时,在FPGA内部集成全部控制逻辑。The demand for functions of image no-grade scaling is progressively increasing in many applications.In this paper,a method of image no-grade scaling which has been validated in practical applications is proposed.The I2C bus communication between the video decoder SAA7114H and other chips is implemented via the control of the MCU.Besides,all the logic controls are integrateed in the FPGA.

关 键 词：SAA7114H 解码 图像 无级缩放 MCU FPGA 

分 类 号：TP391.41[自动化与计算机技术—计算机应用技术]