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机构地区:[1]浙江大学电子电路与信息系统研究所,浙江杭州310027
出 处:《浙江大学学报(理学版)》2012年第3期293-296,共4页Journal of Zhejiang University(Science Edition)
摘 要:在分析了单电子晶体管(SET)的I-V特性后,通过对SET背景电荷的设置,使之具有类似PMOS或NMOS的电学特性;同时将传输电压开关理论引入到SET的电路设计中,并用单栅极SET实现了该理论的基本运算电路.随后以异或门和一位比较器为例,利用这些基本运算电路,进行了基于SET的开关级电路设计.最后,利用Pspice软件验证了所设计的电路逻辑功能正确,设计方法可行;电路的输入输出高低电平一致,具有良好的电压兼容性,易于级联.仿真结果表明,与基于互补结构设计的SET电路相比,基于开关级设计的SET电路具有结构简单、功耗低、延迟小的特点.Based on the analysis of I-V characteristics of single-electron transistor(SET),with some particular settings on the background charge,PMOS- or NMOS-like SET was proposed;meanwhile theory of transmission voltage-switches was introduced into SET circuits design and several basic circuits were realized by single-electron transistors.On the basis of these circuits,XOR and one-bit numerical comparator circuits were presented and verified by simulations with a SPICE package which included the SET-SPICE model.The excellent voltage compatibility of the circuits is achieved with input/output high-and low-voltage approximating 30mv and 0mv respectively.Compared with conventional static complementary logic SET circuits,the amount of device was reduced,and the power dissipation and signal delay were decreased.
分 类 号:TN323[电子电信—物理电子学]
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