数字下变频技术的改进与FPGA实现  

The Improvement of DDC and Realization on FPGA

作　　者：徐双全[1] 蒋宇中[1] 江海[1] 

机构地区：[1]海军工程大学电子工程学院,武汉430033

出　　处：《无线通信技术》2012年第4期35-38,43,共5页Wireless Communication Technology

摘　　要：数字下变频(DDC)是软件无线电系统的关键技术之一,可将高频数据流信号变成低频数据流信号,以适宜于后端数字信号处理器设备实时处理。分析了下变频器的各个组成模块:数字振荡控制器(NCO)、级联积分梳妆(CIC)滤波器、有限长单位冲激响应(FIR)滤波器。并在此基础上对各个模块提出改进方式,给出了一种改进型基于FPGA的数字下变频的设计方案,实验结果表明,改进型数字下变频技术可减少对FPGA内部逻辑资源的消耗,具有可用性和实用性。Digtal Down Conversion(DDC) is one of the key technologies for software radio,which converts high-frequence signals into low-frequence signals for simple real-processing of the DPS(digital signal processor) device.Each component module of DDC is analyzed,including Numerical Controlled Oscillator(NCO),Cascaded Integrator-Comb(CIC) filter and Finite Impulse Response(FIR) filter,An improved DDC design is proposed based on the FPGA(Field Programmable Gate Array) and the corresponding improved method is given.The realization of experiment based demonstrate that the proposed DDC technology can less computation of FPGA resourse,which is usability and practicality.

关 键 词：数字下变频 软件无线电 FPGA 

分 类 号：TP911[自动化与计算机技术]