基于多目标自适应遗传算法的逻辑电路门级进化方法  

Multi-objective Adaptive Genetic Algorithm for Gate-Level Evolution of Logic Circuits

作　　者：赵曙光[1] 王宇平[2] 杨万海[1] 焦李成[1] 

机构地区：[1]西安电子科技大学电子工程学院,西安710071 [2]西安电子科技大学应用数学系,西安710071

出　　处：《计算机辅助设计与图形学学报》2004年第4期402-406,共5页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家自然科学基金 ( 60 13 3 0 10 ;60 3 740 63 );陕西省自然科学基金( 2 0 0 1SL0 6)资助

摘　　要：提出一种改进的遗传算法 ,通过网表级编码、多目标评估和遗传参数自适应等措施 ,可依据多个设计目标 ,以较少的运算量自动生成和优化逻辑电路 在数字乘法器、偶校验器等进化设计实验中 。An adaptive genetic algorithm is proposed for automated design of logic circuit, its main features are using a netlist-level representation scheme allowing to change interconnection and select alternative function for each gate-level module, introducing a simulation based fitness evaluation method, and taking an adaptive strategy to assign genetic parameters. By applying this approach to some basic combinational circuits, including digital multipliers and even-parity checker, the evolution process has generated full functional circuits with novel structure, less gates and higher operating speed as compared with that designed by hand-design and some similar approaches.

关 键 词：电路进化设计 门级进化 自适应遗传算法 多目标进化 可进化硬件 逻辑电路 

分 类 号：TP331.1[自动化与计算机技术—计算机系统结构] O242.23[自动化与计算机技术—计算机科学与技术]