基于高层次综合的JPEG编码器设计  

Design of JPEG Encoder Based on High-Level Synthesis

作　　者：樊宗智 周煦林[1] 刘彬[1] 

机构地区：[1]西安微电子技术研究所,陕西西安710054

出　　处：《微电子学与计算机》2015年第6期32-35,共4页Microelectronics & Computer

摘　　要：为了应对传统设计方法在大规模系统设计中的高复杂度,特采用高层次综合技术设计具有并行流水结构的JPEG编码器,尝试不同的设计结构,得到性能、面积等折衷的最佳设计方案,并实现快速有效的综合与验证.与传统RTL实现相比,本流程集设计、综合、验证于一体,节省50%以上的设计周期.Considering the high complexity of traditional design methods in large-scale system design,a kind of JPEG encoder with parallel pipelined structure is designed,adopting the High-Level Synthesis technology.Then an optimal trade-off solution of performance and area is obtainal,and a rapid and efficient synthesis and verification is realized.The process integrats design,synthesis and verification,saving more than 50%in design cycle,compared with traditional RTL process.

关 键 词：高层次综合 Catapult C 设计周期 JPEG编码 

分 类 号：TN762[电子电信—电路与系统]