构造特定应用领域芯片验证环境的方法讨论  

Creating Verification Environment For Field-Specific Chips

作　　者：杜慧敏[1] 曾泽沧[2] 韩俊刚[2] 沈绪榜 

机构地区：[1]华中科技大学图像研究所,武汉430074 [2]西安邮电学院计算机系,西安710061 [3]骊山微电子公司,西安710010

出　　处：《微电子学与计算机》2004年第6期185-189,共5页Microelectronics & Computer

基　　金：国家自然科学资金资助(项目编号90207015)

摘　　要：由于IC设计复杂度日益增加,用于IC设计功能验证的时间占到整个设计周期的60%～70%.我们认为针对某个领域的产品,开发可配置的验证环境是验证领域的一个方向,本文重点讨论开发特定应用领域芯片的验证环境方法,并介绍了根据该方法,我们开发的一个面向SDH领域系列芯片的验证环境.With the development of IC technology and increase of design complexity, functional verification of medium to large scale ASICs consumes over 60-70% of the design cycle?A method to improving verification efficiency might be developing field-specific verification environments, which can be configured to meet different users' requirements in the field. This article focuses on the methodology of developing field-specific verification environment and introduce a SDH-orient verification environment based on the methodology which provides flexible configuration for different SDH series chip designs to quickly and easily create random scenarios.

关 键 词：功能验证 BFM模型 同步数字系列断言技术 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]