基于0.25μm CMOS工艺的1.8V Rail-to-Rail运算放大器  

A 1.8V Rail-to-Rail Operational Amplifier Based on 0.25μm CMOS Technology

作　　者：翟艳[1] 杨银堂[1] 朱樟明[1] 王帆[1] 

机构地区：[1]西安电子科技大学微电子所,陕西西安710071

出　　处：《电路与系统学报》2004年第5期107-109,共3页Journal of Circuits and Systems

基　　金：国防科技预研基金资助项目(51408010601DZ01)

摘　　要：采用 TSMC 0.25μm CMOS 工艺,设计实现了一种低功耗、高增益带有恒跨导输入级的 Rail-to-Rail 运算放大器。基于 BSIM3V3 Spice 模型,采用 Hspice 对整个电路进行仿真,在 1.8V 的单电源电压工作条件下,直流开环增益达到 108.6dB,相位裕度为 57.2 度,单位增益带宽为 5MHz,功耗为 0.23mW。Based on TSMC 0.25μm CMOS process, a Rail-to-Rail operational amplifier with a constant gm input stage will get a low-power and high gain. The whole circuit is simulated with BSIM3V3 Spice model in Hspice. With a single power supply of 1.8V in simulation, it is demonstrates that the Rail-to-Rail operational amplifier has a open loop gain of 108.6 dB, phase margin of 57.2 degree and unit gain bandwidth of 5MHz, while the static power dissipation is 0.23mW.

关 键 词：Rail—to—Rail 深亚微米 CMOS 恒跨导 运算放大器 

分 类 号：TN402[电子电信—微电子学与固体电子学]