开关磁阻电动机测速电路的VHDL数字化设计  

VHDL Digital Design of SRD Speed-measuring Circuit

作　　者：周百新[1] 王思聪[1] 

机构地区：[1]南京师范大学电气与电子工程学院,南京210042

出　　处：《南京师范大学学报（工程技术版）》2003年第2期46-49,共4页Journal of Nanjing Normal University(Engineering and Technology Edition)

摘　　要：利用数字电路完成对SRD测速电路的设计 ,并用VHDL语言进行描述 .经过功能仿真 ,下载到一片FPGA上制成单片数字化测速电路 ,并在全数字化的SRD系统中使用了该专用测速芯片 .其测速精度优良 ,测速速度优于单片机测速方法 .The SRD speed measuring circuit was designed by digital circuit. VHDL was used to design this circuit. It was downloaded to a FPGA chip after function simulation, for building single piece digital speed measuring circuit. The chip was used in a all digitialized small SRD system and it was found that the precision was high and the speed was much faster than those of single chip computer.

关 键 词：SRD 数字化设计 测速 VHDL 

分 类 号：TM352[电气工程—电机]