一种用于过采样Σ-ΔA/D转换器的抽取滤波器  

Implementation of a Decimation Filter for Oversampling Σ-Δ A/D Converters

作　　者：黎骅[1] 李冬梅[1] 李福乐[1] 王志华[1] 

机构地区：[1]清华大学电子工程系,北京100084

出　　处：《微电子学》2004年第6期678-681,共4页Microelectronics

基　　金：国家高技术(863)SOC片上系统重大专项项目(2002AA1Z1720);国家重大基础研究(973)项目(G2000036508)

摘　　要：　采用0.8μmCMOS工艺,实现了一种用于过采样Σ-ΔA/D转换器的数字抽取滤波器。该滤波器采用多级结构,梳状滤波器作为首级,用最佳一致逼近算法设计的FIR滤波器作为末级,并通过位串行算法硬件实现。芯片测试表明,该滤波器对128倍过采样率、2阶Σ-Δ调制器的输出码流进行处理得到的信噪比为75dB。A decimation filter for oversampling Σ-Δ A/D converter is implemented in 0.8 μm CMOS process. In this filter, a multi-stage structure is adopted, with a comb filter as the first-stage filter and an FIR low-pass filter as the last-stage filter, which is designed with the best equal-ripple uniform approximation algorithm. The bit-serial algorithm is used for its VLSI implementation. By processing the bit stream from a 2-level Σ-Δ modulator with an oversampling ratio of 128, a signal-to-noise ratio of 75 dB is obtained for the filter.

关 键 词：抽取滤波器 位串行算法 过采样 A/D转换器 

分 类 号：TN792[电子电信—电路与系统]