Microblaze微处理器IP Core的结构及应用  

The Architecture And Implementation of Microblaze Microprocessor IP Core

作　　者：龙霞飞[1] 李仁发[1] 

机构地区：[1]湖南大学软件学院湖南省嵌入式计算及系统重点实验室,长沙410082

出　　处：《微处理机》2004年第6期6-9,共4页Microprocessors

摘　　要：本文概要介绍了基于RISC指令集的Microblaze微处理器IPcore体系结构的主要特性和支持的标准外设 ,简述了MicroBlaze嵌入式系统开发环境的功能及使用 ,主要介绍了和PC机串口通讯为应用背景的一种Microblaze嵌入式系统的设计实现 ,给出了系统实现的硬件资源平台以及部分代码 。This paper briefly describes the main features of the architecture for the 32-bit RISC MicroBlaze Microprocessor and which On- chip Peripheral Bus (OPB) Peripherals it support. The paper also introduces the characteristics and functions of Micro- Blaze embedded system's development environment. The paper present a MicroBlaze embedded system with the capability to communicate with PC through UART, include the hardware platform of the embedded system and some code,also make a analysis for it.

关 键 词：Micmblaze微处理器 知识产权内核 现场可编程逻辑阵列 嵌入式系统 

分 类 号：TP399[自动化与计算机技术—计算机应用技术]