范德堡和条状结构埋层电阻的测试及研究  

Research of the Buried Layer van der Pauw and Bar Resistor

作　　者：彭力[1] 赵文彬[1] 

机构地区：[1]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《电子与封装》2005年第4期20-22,19,共4页Electronics & Packaging

摘　　要：薄层电阻经常被用于PCM以及SPICE模型的关键电阻测试。在正常情况下呈现欧姆特性。同时我们可以看到,随偏压的变化,JFET器件中的埋层电阻也发生相应的变化。本文研究了条形电阻和范德堡两种标准结构的电阻,同时利用2D、3D器件模拟,给出了优化电阻测试的路径和方法。Sheet resistance measurements are often used as process control monitors and are a key part of resistor measurements for SPICE models. These are normally Ohmic in nature. However it can be seen that buried layer resistors are strongly affected by the applied bias conditions in a similar mode to JFET operation. In this paper, two standard resistor structures have been studied to investigate this effect: the bar resistor and the van der Pauw. 2D and 3D-device simulation have been used to model the self-modulation and to produce recommendations for optimized routine measurement.

关 键 词：基区变窄效应 埋层电阻 电阻调整 范德堡 条状电阻 

分 类 号：TN407[电子电信—微电子学与固体电子学]