基于等分节点法的时延驱动布局算法  

A New Timing Driven Placement Based on Two Equal Terminals Partition Method

作　　者：程锋[1] 毛军发[1] 

机构地区：[1]上海交通大学电子工程系,上海200030

出　　处：《上海交通大学学报》2005年第4期598-601,共4页Journal of Shanghai Jiaotong University

基　　金：国家自然科学基金(90207010);国家高技术研究发展计划(863)项目(2002AA1Z1520)

摘　　要：提出了一个新的基于等分节点法的时延驱动布局算法.该算法基于对电路时延图的拓扑结构分析,将优化关键路径时延的问题转换成优化关键路径上单元位置的问题,通过建立优化位置单元的队列链表,采用一种新的等分节点法有效地寻找路径上单元的目标位置,从而优化路径上的线网长度,最终达到优化最长路径时延的目的.另外,启发式迭代优化方法很好地统一了以线长优化和路径时延优化为目标的布局算法.对MCNC标准单元测试电路中组合和时序电路的实验结果显示,电路经过时延驱动优化布局后的最大路径时延最多减少了31%.A new timing driven placement algorithm based on two equal terminals partition method for standard cell placement was presented. It pays much attention to critical path topologies and transforms the optimization for path delay into cell location optimization. A tracelist determining the order of cell optimization is built and an efficient approach is used to find the target locations of cells that are directly connected to a path. In addition, a heuristic iterative optimization method is well adopted to combine the wire length optimization and path delay optimization. MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%.

关 键 词：互连线 延迟 时延驱动布局 关键路径 

分 类 号：TN402[电子电信—微电子学与固体电子学]