基于FPGA技术的浮点运算器的设计与实现  

Design and implementation of floating point calculator based on FPGA technology

作　　者：周宁宁[1] 陈燕例[1] 李爱群[1] 

机构地区：[1]南京邮电学院计算机科学与技术系

出　　处：《计算机工程与设计》2005年第6期1578-1581,共4页Computer Engineering and Design

摘　　要：日趋进步和完善的FPGA(现场可编程门阵列)技术推动了当前数字电路的设计。浮点运算器是计算机的一个组成部件,结构比较复杂,利用FPGA技术设计浮点运算器可以缩短产品的开发周期。介绍了基于FPGA技术的浮点运算器的设计与实现。描述了采用VHDL(VHSIC硬件描述语言)和原理图方式设计完成浮点运算器的方法和步骤。利用FPGA技术,能方便灵活地设计出浮点运算器。Further improvement of FPGA(field programable gate array)technology gives an impetus to hardware design. Floating point calculator which has more complex composition is a part of a computer. Designing a floating point calculator using FPGA technology may shorten the development cycle of product. An introduction is given to the design and implementation of a floating point calculator based on FPGA. The method and procedure on designing a floating point calculator are discussed by the way of VHDL (VHSIC hardware description language) and logic diagram separately. Using FPGA technology may design a floating point calculator conveniently and quickly.

关 键 词：FPGA 浮点运算器 VHDL 原理图 

分 类 号：TP33[自动化与计算机技术—计算机系统结构] TN79[自动化与计算机技术—计算机科学与技术]