基于FPGA的PCB测试机硬件电路设计  

The Circuit Design of PCB Tester Based on FPGA

作　　者：杨光友[1] 程良明[1] 苏旭武[1] 张铮[1] 

机构地区：[1]湖北工业大学机械工程学院,湖北武汉430068

出　　处：《湖北工业大学学报》2005年第3期200-202,共3页Journal of Hubei University of Technology

摘　　要：为了提高PCB测试机的测试速度,简化电路板的设计,提高系统的可重构性和测试算法移植的方便性,提出了一种基于FPGA的PCB测试机的硬件控制系统设计方案.设计中选用Altera公司的现场可编程门阵列(FPGA)EP1K50,利用EDA设计工具Synplify、Modelsim、QuartusⅡ以及Verilog硬件描述语言,完成了控制系统的硬件设计及调试,解决了由常规电路难以实现的问题.To enhance the test speed of PCB tester, we simplified the design of circuit board, and improved the reconfiguration ability of the system and the convenience of transplantation of testing algorithmization. In the design, applying Altera corporation′s field programmable gate array (FPGA) ACEX1K EP1K50, using EDA tools such as Symplify, Modelsim, QuartusⅡ and Verilog hardware description language, we accomplished the hardware design and debug of the whole control system, and solved the problem with the conventional circuit using general digital circuit.

关 键 词：PCB测试 可重构FPGA PC104总线 VERILOG 

分 类 号：TN79[电子电信—电路与系统]