串行数字锁相频率合成器的设计  

Design of Serial Digital Phase-locked Frequency Synthesizer

作　　者：李希密[1] 

机构地区：[1]船舶重工集团公司723所,扬州225001

出　　处：《舰船电子对抗》2005年第5期61-64,共4页Shipboard Electronic Countermeasure

摘　　要：介绍了一种利用AT89S52单片机控制数字锁相环LMX2316的低相位噪声频率合成器,分析了环路的带内相位噪声以及环路的锁定时间与环路带宽的关系,讨论了环路滤波器的设计,最后得到了与分析相符合的结果。This paper introduces a kind of low phase noise frequency synthesizer which uses AT89S52 single chip processor to control digital phase-locked loop LMX2316, analyses the in-band phase noise and the relations between lock time and loop bandwidth of loop, discusses the design of the loop filter, finally obtains the results according with the analysis.

关 键 词：数字锁相环 单片机 频率合成器 

分 类 号：TN742.1[电子电信—电路与系统]