阶梯掺杂薄漂移区RESURF LDMOS耐压模型  

A Breakdown Model of Thin Drift Region LDMOS with a Step Doping Profile

作　　者：李琦[1] 张波 李肇基[1] 

机构地区：[1]电子科技大学IC设计中心,成都610054

出　　处：《Journal of Semiconductors》2005年第11期2159-2163,共5页半导体学报（英文版）

摘　　要：提出硅基阶梯掺杂薄漂移区RESURFLDMOS耐压解析模型.通过分区求解二维Poisson方程,获得阶梯掺杂薄漂移区的二维表面电场和击穿电压的解析表达式.借助此模型研究击穿电压与器件结构参数的关系,其解析与数值结果吻合较好.结果表明:在导通电阻相近情况下,阶梯掺杂漂移区LDMOS较均匀漂移区的击穿电压提高约20%,改善了击穿电压和导通电阻的折衷关系.An analytical breakdown model for thin drift region RESURF LDMOS with a step doping profile is presented. Based on 2D Poisson equation, the derived model gives the solutions of the surface field distributions and the breakdown voltage. The influence of all design parameters on breakdown voltage is calculated. All analytical results are well verified by the numerical analysis obtained by the semiconductor device simulator MEDICI. The breakdown voltage of the step profile structure increases by a factor of 1.2 compared with the conventional RESURF device.

关 键 词：薄漂移区 阶梯掺杂 击穿电压 模型 

分 类 号：TN386[电子电信—物理电子学]