基于March X算法的SRAM BIST的设计  

SRAM BIST Design Based on March X Algorithm

作　　者：冯国臣[1] 沈绪榜[1] 刘春燕[1] 

机构地区：[1]西安微电子技术研究所,陕西西安710054

出　　处：《微电子学与计算机》2005年第12期44-47,共4页Microelectronics & Computer

摘　　要：针对LS-DSP中嵌入的128kbSRAM模块,讨论了基于MarchX算法的BIST电路的设计。根据SRAM的故障模型和测试算法的故障覆盖率,讨论了测试算法的选择、数据背景的产生;完成了基于MarchX算法的BIST电路的设计。128kbSRAMBIST电路的规模约为2000门,仅占存储器面积的1.2%,故障覆盖率高于80%。To 128kb SRAM embedded in LS-DSP, the BIST circuits based on March X algorithm are discussed. The selection of test algorithm and the generation of the data background are discussed at first, based on the fault model and the fault rate of the algorithm. Based on March X algorithm, the BIST circuits are finished. And its scale is about 2000 gates. The area is only about 1.2% of the SRAM, while the fault coverage is higher than 80%.

关 键 词：SRAM.测试 MARCH算法 BIST 

分 类 号：TP301.6[自动化与计算机技术—计算机系统结构]