基于FPGA的全状态伪随机序列发生器的实现  

Realization of all-statec pseudo-random sequence generators with FPGA

作　　者：段颖妮[1] 吕虹[1] 张海峰[2] 

机构地区：[1]安徽工程科技学院电气工程系,安徽芜湖241000 [2]暨南大学光电工程研究所,广东广州510632

出　　处：《安徽工程科技学院学报（自然科学版）》2005年第4期43-46,共4页Journal of Anhui University of Technology and Science

基　　金：安徽省自然科学基金资助项目(050420203)

摘　　要：针对伪随机序列信号产生的疑难问题,提出了通过设计非线性移位计数器的反馈网络函数,并根据伪随机序列三个性质,即平衡特性、游程特性、相关特性,遴选出能够实现性能优良的多位全状态伪随机序列发生器的非线性网络.给出了应用VHDL语言实现8位全状态伪随机序列的程序及应用MAXPLUSⅡ软件对该序列进行仿真的结果,并通过现场可编程阵列FPGA实现全状态伪随机序列发生器.Aiming at the problems brougth about by pseudo-random sequence, the paper puts forward the method to choose the nonlinear feedback network, which can make full use of muliti-bit all-state pseudorandom sequence generator, by designing the feedback network function of nonlinear shift counter and using the three characteristics of pseudo-random sequence： the balanced characteristic, run-course characteristic, correlation characteristic. Also, the authors gives the program which is to realize 8-bit allstate pseudo-random sequence by using VHDL language and simulating by using maxplus Ⅱ. Lastly, FPGA is employed for all-state pseudo-random sequence generator.

关 键 词：全状态 移位型计数器 FPGA 伪随机 

分 类 号：TN431[电子电信—微电子学与固体电子学] TP302.2[自动化与计算机技术—计算机系统结构]