非对称性隧穿势垒Ge/Si复合纳米结构MOSFET存储特性的电路模拟  

Circuit Simulation of Single Electron Device with Asymmetric Tunnel Barriers

作　　者：周少华[1] 杨红官[1] 

机构地区：[1]湖南大学应用物理系

出　　处：《湖南工程学院学报（自然科学版）》2006年第1期12-15,共4页Journal of Hunan Institute of Engineering(Natural Science Edition)

摘　　要：介绍了非对称性势垒单电子管(ATBs)的电路模拟和特性,以及采用准经典的Monte Carlo方法对Ge/Si复合纳米结构MOSFET存储器的电路模拟,得出由于台阶状复合势垒的作用,在擦写时间保持μs和ms量级的同时,存储时间可长达数年.从而解决了快速编程与长久存储之间的矛盾.In this paper,the property and circuit simulation of the Single Electron Device based on Asymmetric Tunnel Barriers, and the Ge/Si nanocrystal MOSFET memory with the Monte Carlo method in quasic classical approximation are introduced. It is demonstrated that the proposed device can achieve the programming in the order of/~s or ms owing to the hetero-energy bands, and the retention time is increased to several years at the same time. Hence the conflict between high speed programming and long retention can be efficiently resolved.

关 键 词：非对称势垒 复合纳米结构 单电子存储器 电路模拟 

分 类 号：TN386.1[电子电信—物理电子学]