多芯片组件布线算法研究  

Study of Routing Algorithm in Multichip Modules

作　　者：畅艺峰[1] 杨银堂[1] 

机构地区：[1]西安电子科技大学微电子所宽禁带半导体材料与器件教育部重点实验室,西安710071

出　　处：《电子与信息学报》2006年第3期567-569,共3页Journal of Electronics & Information Technology

基　　金：国家部级基金资助课题

摘　　要：该文以多芯片组件布线中的四通孔(V4R)算法为基础,针对其布线结果不均匀、产生多余噪声的缺陷,通过引入PST(Priority Search Tree)和LEA(Left Edge Algorithm)方法,移除过孔或拐角,减小布线层数,减少噪声,以达到总体布线结果优化。计算机模拟结果表明,优化后的算法有效利用了布线空间,在电特性方面使延时和噪声均得到减小。Aiming at the uneven routing results and much noise, this paper presents an improved method for multichip module routing that based on the four-via routing algorithm. By using the PST（Priority Search Tree） and LEA（Left Edge Algorithm） algorithms to restrict routing layers, remove vias or jogs and reduce noise, the result is optimized. The computer simulation results show that routing space is efficiently utilized and the delay and noise are also reduced in the field of electric feature.

关 键 词：多芯片组件 布线算法 四通孔 

分 类 号：TN405.97[电子电信—微电子学与固体电子学]