线速取余的分段递归查表机制  

Segment recursion look up mechanism for calculating residue at line-speed

作　　者：廖鹰[1] 庞学民[1] 贾凤根[1] 孟罡[1] 

机构地区：[1]信息工程大学,河南郑州450001

出　　处：《计算机工程与设计》2006年第6期941-942,951,共3页Computer Engineering and Design

基　　金：国家863高技术研究发展计划基金项目(2001-AA-12-1-011)

摘　　要：线速处理是核心路由器的关键性能需求,在ATM线路接口的硬件设计中,需要进行G比特级的线速取余运算。在对线速取余的实现进行了研究后,利用对2取余的简便性,将被除数进行分段,同时结合递归查表的方式,提出一种具有一般性的对非2取余的分段式递归查表机制,解决了G比特级线速取余的问题,并在IPv6核心路由器中得到了应用。Line-speed processing is the vital performance requirement of core muter. In the hardware design of ATM line interface, calculating residue at G bps line-speed is implemented. Implementation of calculating residue at line-speed is studied. With the simplicity of calculating residue of 2^n, the dividend is segmented. And combining with the recursion looking up technology, a universal segment recursion looking up mechanism is presented, which is for calculating residue of the number isn＇t 2^n to solve the problem of calculating residue at G bps line-speed. The scenario has been applied in the IPv6 core router.

关 键 词：线速处理 取余 分段 递归 核心路由器 

分 类 号：TN915[电子电信—通信与信息系统]