基于TMS320C6416 VCP协处理器的Viterbi译码实现  

Viterbi decoding based on TMS320C6416 VCP coprocessor

作　　者：许华[1] 罗汉文[1] 葛建华[1] 

机构地区：[1]上海交通大学无线通信研究所,上海200030

出　　处：《信息技术》2006年第4期12-14,18,共4页Information Technology

基　　金：国家自然科学基金重点项目(60332030);国家863项目资助(2003AA123310)

摘　　要：介绍了TMS320C6416型号DSP内部协处理译码器VCP的算法和结构。其基本思想是CPU通过寄存器控制VCP,并由EDMA控制器同VCP进行数据交互来实现译码。文中还使用VCP对802.16e标准中的几种卷积码进行维特比译码,并分析了性能。This paper introduced the structure and arithmetic of Viterbi coprocessor embedded in Texas Instruments＇ TMS320C6000 family DSP device. The basic idea is that CPU accesses VCP through registers, while exchanging data between VCP and EDMA controller to realize decoding. In addition, the several Viterbi decoded data according to the convolutional code in protocol 802.16e using VCP are gotten, and their performances are analyzed.

关 键 词：TMS320C6416 VCP VITERBI译码 EDMA 参数RAM 

分 类 号：TN919.32[电子电信—通信与信息系统]