The Logic Description of the System of Embedded Hardware Logic Task  

作　　者：FENG Dan ZHU Yong ZHANG Jiangling 

机构地区：[1]College of Computer Science and Technology,Huazhong University of Science and Technology, Wuhan 430074, Hubei, China [2]Department of Computer Science, Wuhan University of Science and Engineering, Wuhan 430073, Hubei, China

出　　处：《Wuhan University Journal of Natural Sciences》2006年第3期567-571,共5页武汉大学学报（自然科学英文版）

基　　金：Supported bythe National Basic Research Programof China (973 Program2004CB318201) ;the National Natural Sci-ence Foundation of China (60273074)

摘　　要：A new task mode, hardware logic task mode, is presented. Its architecture, schedule and implementation are described with HDI.（ Hardware Description Language ）, and the validity of the system has been proved by logic simulation. It has advantage for real-time applications and overheadsaving for operating .system, so it is profitable for the controller in the embedded system. The relationship among RTOS （Real-Time Operating System）, SoC（System on Chip）, VIA （Virtual Interface Architecture） and hardware logic task is also discussed in the paper.A new task mode, hardware logic task mode, is presented. Its architecture, schedule and implementation are described with HDI.（ Hardware Description Language ）, and the validity of the system has been proved by logic simulation. It has advantage for real-time applications and overheadsaving for operating .system, so it is profitable for the controller in the embedded system. The relationship among RTOS （Real-Time Operating System）, SoC（System on Chip）, VIA （Virtual Interface Architecture） and hardware logic task is also discussed in the paper.

关 键 词：TASK hardware description language embedded system SCHEDULE 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]