超宽范围可变速率时钟恢复技术及其实现  

Super wide-range variable-rate timing recovery scheme and implementation

作　　者：刘奇佳[1] 潘长勇[1] 张国敬[1] 

机构地区：[1]清华大学微波与数字通信技术国家重点实验室,北京100084

出　　处：《系统工程与电子技术》2006年第5期674-676,692,共4页Systems Engineering and Electronics

摘　　要：针对多种速率卫星信号的接收,提出并实现了一种针对QPSK信号的20 Mbps^320 Mbps超宽范围可变速率的数字时钟恢复算法。基于直接数字频率合成技术,该算法利用超前-滞后型鉴相器组成时钟恢复数字锁相环路,并采用由时域分析得到的一些方法扩大捕捉范围、降低时钟抖动。计算机仿真和硬件实现的结果验证了该算法具有超宽的捕捉范围和良好的时钟抖动性能。To investigate the reception of multi-rate satellite signals, a super wide-range variable-rate digital timing recovery algorithm is proposed, which is suitable for QPSK signals with rates ranging from 20 Mbps to 320 Mbps. Based on the direct digital synthesizer （DDS）, the algorithm uses the structure of DPLL comprised of lead-lag phase detector for timing recovery. Furthermore, new methods derived from time-domain analysis are presented to widen the acquisition range and reduce timing jitter. Simulation and implementation results show the super wide acquisition range and good timing-jitter performance under practical conditions.

关 键 词：时钟恢复 数字锁相环 鉴相器 直接数字频率合成 

分 类 号：TN92[电子电信—通信与信息系统]