一种新的基于SRAM的快速综合技术  

A New Fast-synthesized Technique Based on SRAM

作　　者：张锋[1] 周玉梅[1] 黄令仪[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《固体电子学研究与进展》2006年第2期255-259,共5页Research & Progress of SSE

摘　　要：对静态随机存储器(SRAM)全定制设计过程中的版图设计工作量大、重复性强的问题进行了分析,并在此基础上提出了一种新的应用于SRAM设计的快速综合技术。这种技术充分利用SRAM电路重复单元多的特点,在设计过程中尽可能把电路版图的硬件设计转换为使用软件来实现,节省了大量的版图设计和验证的时间,从而提高了工作效率。这种技术在龙芯Ⅱ号CPU的SRAM设计中得到了应用;芯片采用的是中芯国际0.18μm CM O S工艺。流片验证表明,该技术对于大容量的SRAM设计是较为准确而且有效的。The problems that the layout design needs many and repeated processes in full custom design of SRAM are analyzed, on the basis of which a new fast-synthesized technique that can be applied in SRAM design is presented. The technique makes much use of the characters of SRAM circuits that have many same cells, and use software to design circuits and layout instead of hardware to realize in the design process. It can save much layout design and verification time, and improves the work efficiency. Meanwhile, the technique has been applied in the Godson Ⅱ CPU SRAM design. The chip uses the SMIC 0. 18 μm CMOS technique. The taped-out chip shows, the technique is relatively accurate and much effective for the large capacity SRAM design.

关 键 词：综合技术 版图设计 网表 验证 

分 类 号：TN402[电子电信—微电子学与固体电子学]