低压CMOS满幅度恒定增益运算放大器设计  

Low Voltage CMOS Rail-to-Rail Constant Gain Operational Amplifier Design

作　　者：何红宇[1] 陈国鼎[1] 周展怀[1] 

机构地区：[1]广东工业大学物理与光电工程学院,广东广州510090

出　　处：《现代电子技术》2006年第14期6-7,10,共3页Modern Electronics Technique

摘　　要：运用负反馈控制输入共模电平,实现了电源电压仅为0.9 V的满幅度运算放大器。采用TSMC 0.35μm CMOS工艺参数HSPICE模拟结果显示,在满幅度共模电平下,运放的平均直流电压增益为66.4 dB(10 pF电容负载),增益波动仅为0.01%,平均单位增益带宽为1.88 MHz,平均相位裕度52°,平均静态功耗仅为135μW。Using negative feedback over the input common-mode signal, the rail-to-rail operational amplifier is realized with the single supply 0. 9 V. It is simulated in HSPICE with TSMC 0. 35μm CMOS process. In the full input common range, the DC voltage gain is 66.4 dB （with 10 pF capacitor load）with 0. 01% variation, the average unit gain bandwidth is 1, 88 MHz,the average phase margin is 52°,the average static dissipation is 135 μW.

关 键 词：低压 低功耗CMOS RAIL-TO-RAIL 运算放大器 

分 类 号：TN722.77[电子电信—电路与系统]