一种基于谓词执行优化技术的寄存器分配算法  

A Register Allocation Algorithm for Predicated Code

作　　者：王凤芹[1] 胡定磊[1] 刘春林[1] 

机构地区：[1]国防科学技术大学计算机学院,长沙410073

出　　处：《计算机研究与发展》2006年第8期1471-1476,共6页Journal of Computer Research and Development

基　　金：国家"八六三"高技术研究发展计划重点基金项目(2004AA1Z1040)~~

摘　　要：对采用谓词执行优化技术后的编译代码,为了更高效地进行寄存器分配,首先介绍了Sias等人提出的一种基于二进制决策图(BDD)的谓词分析系统;然后在其基础上,对传统寄存器分配算法进行改进,给出了一种建立精化干涉图的新算法;最后将算法在学院研制的YHFT-DSP/700芯片的编译器上实现,实验结果表明,减少了所需寄存器数目,缩短了代码执行时间,获得了较好的性能提高·In order to allocate registers efficiently for predicated code, a predicate analysis system based on binary decision diagrams is introduced first, which is put forward by John W. Sias et al. And then the traditional register allocation procedure is improved, and a new algorithm for constructing refined interference graph is presented. The algorithm have been implemented in the compiler of YHFT-DSP/700 chip developed by the authors＇ college. Experiment results show that the number of used registers is reduced, the code execution time is shortened, and the performance is improved greatly.

关 键 词：寄存器分配 谓词执行 谓词分析 二进制决策图 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]