对一种洗衣机控制器的FPGA设计改进  

Improvement on the Design of a Washer Controller Basing on FPGA

作　　者：司孝平[1] 赵严峰[2] 

机构地区：[1]华北水利水电学院信息工程系,河南郑州450011 [2]黄淮学院电子科学系,河南驻马店463000

出　　处：《佳木斯大学学报（自然科学版）》2006年第3期356-359,共4页Journal of Jiamusi University：Natural Science Edition

摘　　要：针对一种洗衣机控制器的FPGA的设计的不尽完善之处进行了改进.用ModelSim6.0对改进后控制器的verilogHDL代码进行了前后仿真,并在伟福EDA6000仿真系统实验仪上实现了此控制器.The Improvement on design of a Washer Controller Basing on FPGA was carried out. Both functional and timing simulation to the verilng HDL source code for the washer controller were carried out with the ModelSim 6. 0. And this washer controller was implemented on the EDA6000 System for Development of EDA made by Nanjing Wave Corp.

关 键 词：FPGA设计 VERILOG HDL 仿真 洗衣机控制器 

分 类 号：TP303.2[自动化与计算机技术—计算机系统结构]