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机构地区:[1]江南大学控制科学与工程研究中心,无锡214122
出 处:《自动化仪表》2006年第9期23-26,共4页Process Automation Instrumentation
摘 要:详细阐述了增强用户自定义IP核可重用性的设计方法和使用SOPC Builder开发用户自定义IP核的流程。并在此基础上,开发出脉冲宽度调制器(PWM)自定义IP核。首先,在Quartus II环境下,采用自顶向下、模块化的设计方法,基于VHDL实现了PWM硬件。然后,在NiosⅡIDE环境下,基于C语言开发了PWM的软件应用程序接口(API)函数。最后,完成了PWM自定义IP核的系统测试。测试结果表明:该PWM自定义IP核具有比较好的可重用性和用户界面。对开发面向SOPC Builder的用户自定义IP核具有借鉴意义。The design methodology for enhancing the reusability of user-defined IP cores and the development flows of user-defined IP cores using SOPC Builder are described in detail. The PWM user-defined IP core was developed based on above conditions. Firstly, the PWM hardware was implemented with VHDL using top-to-bottom and modtdarization design method under the Quartus Ⅱ environment. Then, the PWM software API functions were developed with C language under Nios Ⅱ IDE environment. Finally, the system-level test verification was completed. The result validates the fact that PWM user-defined IP core possesses better characteristics of reusability and user-interface. The paper provides valuable guiding information for development of user-defined IP cores facing SOPC Builder.
分 类 号:TP3[自动化与计算机技术—计算机科学与技术]
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