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作 者:封国强[1] 蔡坚[1] 王水弟[1] 贾松良[1]
出 处:《半导体技术》2006年第10期766-769,781,共5页Semiconductor Technology
摘 要:采用KOH刻蚀工艺制作硅垂直互连用通孔,淀积SiO2作为硅垂直互连的电绝缘层,溅射Ti和Cu分别作为Cu互连线的黏附层/扩散阻挡层和电镀种子层。电镀10μm厚的Cu作为硅垂直互连的导电层。为实现金属布线的图形化,在已有垂直互连的硅片上试验了干膜光刻工艺。采用化学镀工艺,在Cu互连线上沉积150~200nm厚的NiMoP薄膜作为防止Cu腐蚀和Cu向其上层介质扩散的覆盖层。高温退火验证了Ti阻挡层和NiMoP覆盖层的可靠性。Vertical interconnect silicon via was made by KOH etching process. A SiO2 layer was deposited as the insulation layer, sputtering Ti/Cu was applied for adhesion/barrier layer and seed layer. Electroplating Cu, 10 μ m, was used as conductive layer for the silicon vertical interconnects. In order to reroute the metal layer, photosensitive dry film was carried out on the ready vertical interconnect silicon wafer. Thin NiMoP film, 150~200 nm, was deposited on Cu traces by electroless plating as capping layer to prevent Cu from corrosion and diffusion into above dielectric. The reliability of Ti and NiMoP was verified by high temperature anneal.
分 类 号:TN305.94[电子电信—物理电子学]
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