多种IC设计中Cu CMP阻挡层浆料选择和去除率的控制  

Controlling Removal Rates and Selectivity in Barrier Slurry for Cu CMP for a Variety of IC designs

作　　者：Jinru Bian Matthew VanHanehem Hugh Li 高仰月（译） 

机构地区：[1]Rohm and Haas Electronic Materials, CMP Technologies Newark, Delaware,U.S.A. [2]不详

出　　处：《电子工业专用设备》2006年第10期14-18,共5页Equipment for Electronic Products Manufacturing

摘　　要：集成电路的前缘技术是在低k介质材料上设计3个盖层的复杂结构,上面的盖层可以用TEOS(tetraethyl orthosilicate)四乙基原硅酸盐和/或氮化硅(SiN),下面的层可以在低k介质之上用氮碳化硅(SiCN),碳化硅(SiC),或CDO(carbon dopped oxide)直接生成。因此,对于适合铜CMP的选择性浆料,除了具备的高去除率之外,须是在去除上面盖层后能够在下面的介质层表面上终止的浆料。Rohm和Haas电子材料已经开发出能够有效地去除TaN,TEPS,SiN,CDO和/或SiCN,或这些材料的任一化合物的一系列浆料,或者是能够在TEOS、SiN、CDO、SiCN和SiC的任何一种或两种薄膜表面终止,这完全取决于这些特殊浆料的配方设计,通过一两种添加剂控制去除率达到要求。系列浆料中的大多数浆料研磨剂的含量较低,在低压力的情况下具有良好的去除率,为了适应多种行业的需求,高低pH值均可使用。大多数浆料是可调的,用一种或两种添加剂来控制薄膜的去除率。描述和讨论了这些浆料的改良原理。Leading edge integrated circuits （ICs） are complicated structures designed to have up to 3 capping layers above a low k dielectric material. The upper capping later may use TEOS and/or silicon nitride （SIN） while the lower one may use silicon carbon nitride （SiCN）, silicon carbide （SIC）, or carbon dopped oxide （CDO） immediately above the low k dielectric. Therefore, a barrier slurry for copper CMP, in addition to exhibition a high removal rate of the barrier, must be able to remove the upper capping layer and stop at the underlying dielectric surface. Rohm and Haas Electronic Materials has developed a slurry family that can effectively remove TaN, TEOS, SiN, CDO, and/or SiCN, or any combination of these films, or can stop at any one or two film surfaces of TEOS, SiN, CDO, SiCN, and SiC, depending on the specific slurry design. Removal rates at low down force, and are at either high or low pH, in order to satisfy a variety of industry requirements. Most of the slurries are tunable with one or two additives to control the removal rates of the films. The principles for development of these slurries are described and discussed.

关 键 词：化学机械抛光 去除率 阻挡层浆料 

分 类 号：TN305.2[电子电信—物理电子学]