集成电路互连延迟问题的研究及对策  

The study and resolution ways of IC interconnect wire delay

作　　者：傅毅[1] 须文波[1] 

机构地区：[1]江南大学信息工程学院

出　　处：《微计算机信息》2006年第11Z期209-211,共3页Control & Automation

摘　　要：随着深亚微米集成电路的发展,互连延迟现象对信号完整性、功耗等的影响正在增加。本文讨论了影响互连线延迟的因素,并讨论了从降低信号摆幅、改变开关阈值方面解决延迟、功耗等问题。Along with the development of the deep submicron VLSI,the signal integrity and energy consume etc.which influenced by interconnect wire delay are just increase.The factors that affect the interconnect wire delay and the resolution ways from to lower the signal swing and change switch threshold value aspect are described in this paper.

关 键 词：互连线 延迟 功耗 信号摆幅 

分 类 号：TN47[电子电信—微电子学与固体电子学]