衬底驱动超低压CMOS带隙基准电压源  

Ultra-low Voltage CMOS Bandgap Voltage Reference Based on Bulk-driven Technique

作　　者：张海军[1] 杨银堂[1] 朱樟明[1] 张宝君[1] 

机构地区：[1]西安电子科技大学微电子研究所

出　　处：《固体电子学研究与进展》2006年第4期531-535,共5页Research & Progress of SSE

基　　金：国家自然科学基金(No.60476046.90207022);国家预研基金(No.51408010601DZ01)资助

摘　　要：采用二阶温度补偿和电流反馈技术，设计实现了一种基于衬底驱动技术和电阻分压技术的超低压CMOS带隙基准电压源。采用衬底驱动超低压运算放大器作为基准源的负反馈，使其输出用于产生自身的电流源偏置，其电源抑制比（PSRR）为-63.8dB。采用Hspice仿真，在0．9V电源电压下，输出基准电压为572．45mV，温度系数为13．3ppm／℃。在0．8～1．4V电源电压范围内，输出基准电压变化3．5mV。基于TSMC 0．25μm 2P5M CMOS工艺实现的衬底驱动带隙基准电压源的版图面积为203μm×478．1μm。Based on bulk driven and resistive subdivision techniques, an ultra-low voltage CMOS bandgap reference using second-order temperature and current feedback techniques is realized. The bulk-driven op amp is applied as the negative feedback of the reference. Its output is used to bias its current sources, leading to a higher power supply rejection ratio （PSRR）, that is -63.8 dB. The bandgap reference is simulated by Hspice simulator. Under a 0. 9 V supply, the output voltage of the reference is 572.45 mV, and its temperature coefficient is 13.3 ppm/℃. The variation of the output with supply voltage range of 0. 8～1.4 V is 3.5 mV. Based on TSMC 0.25μm 2P5M CMOS process, the die area of the proposed bulk-driven bandgap voltage is 203μm×478. 1μm.

关 键 词：衬底驱动 超低压 互补金属氧化物半导体 带隙基准源 温度系数 电源抑制比 

分 类 号：TN402[电子电信—微电子学与固体电子学]