一种可配置Nand-Flash控制器的设计  

A design of configurable Nand-Flash controller

作　　者：薛杰 戎蒙恬[1] 刘文江[1] 

机构地区：[1]上海交通大学电子工程系,上海200240

出　　处：《信息技术》2006年第11期1-4,29,共5页Information Technology

基　　金：国家自然科学基金委创新研究群体基金项目(60521002);上海应用材料与研究发展基金项目(0501)

摘　　要：Nand Flash以其优越的性能及更大的容量,在数码产品中得到广泛应用。在嵌入式SoC中集成Nand Flash控制器已成为一种趋势。介绍了一种可配置低功耗的Nand-Flash控制器的设计,兼容各大厂家的Flash芯片。支持8bit和16bit的数据口,内部具有可配置的FIFO自动时钟控制。在80MHz频率下,该设计的数据传输率可达到Nand Flash能承受的最大值,占用CPU资源少,满足了实际应用的设计要求。该设计已通过仿真和芯片验证测试。With the outstanding performance and capability, Nand Flash has been widely used in digital products. Implementation of Nand Flash controller in embedded system is more and more popular. This article deals with the realization of a configurable and low - power consumption Nand - Flash controller which supports 8 - bit and 16 - bit I/O port. The configurable timing control module makes it compatible with most of the Flash models. The conflgumble FIFO makes it possible to reach the peak data rate at the I/O port with low CPU usage even at the frequency of 80MHz. It is verified that with the simulation and real chip function test, the design meets the requirement for the application.

关 键 词：NAND闪存 软硬件划分 状态机 FIFO 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]