若干编译优化技术的工程实现  

Implementation instances of several compilation optimizations

作　　者：吴圣宁[1] 李思昆[1] 

机构地区：[1]国防科技大学计算机学院,长沙410073

出　　处：《计算机工程与应用》2007年第3期19-21,共3页Computer Engineering and Applications

基　　金：国家自然科学基金资助项目(90207019);国家863高技术研究发展计划资助项目(2002AA1Z1480)。

摘　　要：嵌入式系统对功耗、实时性等的苛刻要求,使得嵌入式处理器常采用不规则体系结构特征提供硬件支持。充分发挥嵌入式处理器的功能,需要复杂的编译优化技术。介绍了MachineSUIF编译框架,给出了若干图着色寄存器分配算法在此框架下的工程实现和实验结果,说明了灵活可扩展的编译框架是快速开发复杂的嵌入式环境编译技术的重要基础。Embedded processors always provide hardware support by irregular architectural features,due to the rigorous requirements of embedded systems at power and real-time,etc.Complex compilation optimizations are needed in order to make embedded processors function efficlent.This paper introduces MachineSUIF,a compilation research infrastructure,and proposes the implementation instances of several graph-coloring register allocation algorithms and their experimental resuhs.h is emphasized that a flexible and extensible research infrastructure is the important basis for developing complex compilation optimizations rapidly in embedded domain.

关 键 词：寄存器分配 元启发式算法 嵌入式处理器 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]