构造SoC级透明路径的0-1规划方法  

Binary Programming-based transparency path construction for SoC test access

作　　者：邢建辉[1] 王红[1] 杨士元[1] 成本茂[1] 

机构地区：[1]清华大学自动化系,北京100084

出　　处：《清华大学学报（自然科学版）》2007年第1期147-149,153,共4页Journal of Tsinghua University(Science and Technology)

基　　金：国家"九七三"基础研究项目(2005CB321604);国家自然科学基金资助项目(90207016)

摘　　要：为解决如何以低面积开销为系统芯片(SoC)构建透明路径测试访问机制从而有效进行测试复用的问题,提出了SoC级透明路径构建方法,将透明路径构建问题转化为0-1规划问题,同时考虑测试调度,以缩短测试加载时间和减小面积开销为优化目标,利用IP模块内部的透明路径和模块间互连关系为每个待测模块构建测试访问通路。实验结果表明:该透明路径构建方法的面积开销比Ghosh方法降低50%,测试加载时间比Yoneda方法大大缩短,验证了该方法的有效性。SoC （system-on-chip） development demands efficient test access mechanisms with low area overhead and short test application times. A transparency path construction approach was developed using binary programming for SoC test access by describing the transparency path construction as a binary programming problem. The approach concurrently optimizes the total test application time and the area overhead and guarantees test access and test application frequency for each core. Test results show that the approach reduces the area overhead by 50% eompared with earlier approaches, and shortens the test application time.

关 键 词：测试和检验 系统芯片 测试访问机制 透明路径 整数规划 

分 类 号：TN407[电子电信—微电子学与固体电子学]