流水线ADC的系统级仿真  

System Level Simulation of Pipelined ADC

作　　者：郑晓燕[1] 王洪利[1] 仇玉林[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《电子器件》2006年第4期1288-1291,共4页Chinese Journal of Electron Devices

摘　　要：应用模拟电路自顶向下的设计思想,用MATLAB建立了一个流水线型模数转换器的行为模型,从而可以有效确定系统结构及相关模块参数。为了对实际电路有较好的指导作用,充分考虑了电路的非理想特性和噪声。最后通过设定一个分辨率为10 bit,采样频率为80 MHz,1.5 bit/级的经典流水线型数模转换器模型的非理想参数值和噪声参数,对ADC模型的主要性能参数进行了仿真计算。According tO the idea of top-down design flow, a behavior model of pipelined ADC is built with MATLAB software to confirm the structure of the system and the performance target of each block. Nonideal factors and thermal noise of analog blocks are fully considered so that the simulation results are referential in circuit level. Finally, thermal noise and non-ideal factors of a 10 bit, 80MHz, 1.5 bit/stage pipelined ADC are set and some important performance parameters are computed.

关 键 词：行为模型 流水线ADC MATLAB 

分 类 号：TN402[电子电信—微电子学与固体电子学]