数字抑制载波跟踪环优化设计  

Research on Optimization Design of Digital Track of Carrier Loop

作　　者：刘丽[1] 何加铭[1] 曾兴斌[1] 王涛[1] 

机构地区：[1]宁波大学通信技术研究所,浙江宁波315211

出　　处：《宁波大学学报（理工版）》2007年第1期9-13,共5页Journal of Ningbo University：Natural Science and Engineering Edition

基　　金：国家自然科学基金项目(60372026);宁波市工业攻关项目(2003B10012).

摘　　要：抑制载波跟踪是扩频通信中数字基带信号处理的一项关键技术,在重点研究数字锁相环理论的基础上,本文提出一种新的载波恢复实现方案,把软件实现(VHDL)和数字电路实现相结合,运用了数字Costas环、数字移相器和数字计数器等模块,使得设计高效且灵活,并解决了数字环路滤波器调节环路跟踪速度以及抑制噪声在理论上表述不清楚的问题.并通过MAX+Plus仿真和FPGA硬件平台测试验证.In spectrum-spreading telecommunication system, suppressed carrier tracking is a key technology in the transmission process of digital based signal. Based on the research on digital phase locked loop theory, this paper proposes a new implementation scheme for the carrier recovery, making it possible for the combination of the implementation of VHDL and the digital circle. By using the modules such as digital Costas loop, digital phase shifter and digital numerator, the design achieves high efficiency and flexibility. Also, it clarifies some confusions existing in the theory of the tracking speed of digital loop filter and the noise suppression. The scheme＇s feasibility is demonstrated through the test of MAX＋Plus Emulation and FPGA hardware platform.

关 键 词：抑制载波跟踪 扩频通信 数字锁相环 FPGA 

分 类 号：TN915.04[电子电信—通信与信息系统]