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机构地区:[1]西安交通大学动力工程多相流国家重点实验室,陕西西安710049 [2]九州大学,日本福冈8168580
出 处:《工程热物理学报》2006年第2期247-250,共4页Journal of Engineering Thermophysics
基 金:国家重点基础研究专项经费资助项目(No.2006CB601203)创新研究群体科学基金资助(No.50521604)
摘 要:针对电子器件的高效冷却问题,对表面加工有微结构的硅片上FC-72的池沸腾换热性能进行了实验研究。测试了四种表面微结构,采用化学蒸汽沉积法在芯片表面生成-SiO2薄层所形成的亚微米粗糙面(Chip CVD),采用溅射方法在芯片表面生成-SiO2薄层,然后再对SiO2层进行湿式腐蚀技术处理形成的亚微米粗糙面(Chip E),采用一系列微电子加工技术生成的微米级双重入口洞穴(Chip CAVITY)以及采用干式腐蚀方法生成的方柱微结构(Chip PF)。实验所得的沸腾曲线表明,所有微结构表面与光滑面(Chip S)相比都显示出较大的强化沸腾换热效果,临界热流密度按芯片 S、E、CVD、CAVITY和PF的顺序增大。对于芯片PF来说,随着壁面过热度的增加,热流量呈剧烈的增加趋势且临界热流密度时芯片的表面温度低于芯片回路正常工作的临界上限温度85℃,最大临界热流密度可达80 W/cm2。For efficiently cooling electronic components, experiments were conducted to study the pool boiling heat transfer performance of FC-72 over silicon chips with surface microstructures. Four different microstructures were studied: a submicron-scale roughness fabricated by chemical vapor deposition of thin SiO2 film (Chip CVD) or by sputtering of thin SiO2 film followed by wet etching of the surface (Chip E),micro-reentrant cavities fabricated by a combination of microelectronic fabrication techniques (Chips CAVITY), and micro-pin-fins fabricated by dry etching (Chip PF). All chips with microstructures showed a considerable heat transfer enhancement compared to a smooth surface (Chip S) and the critical heat flux increased in the order of chips S, E, CVD, CAVITY and PF. Chip PF showed a sharp increase in heat flux with increasing wall superheat and the wall temperature at the critical heat flux (CHF) was less than the upper limit for the reliable operation of LSI chips, 85℃, and the maximum CHF can reach 80 W/cm^2.
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