一种基于ISS的软硬件协同验证环境  

A Hardware-Software Co-verification Environment Based on Instruction Set Simulator

作　　者：幸强[1] 

机构地区：[1]东南大学国家专业集成电路系统工程技术研究中心,江苏南京210096

出　　处：《现代电子技术》2007年第8期151-153,共3页Modern Electronics Technique

摘　　要：讨论了一种面向SOC设计的基于指令级仿真器(ISS)的软硬件协同验证环境。在该环境中,硬件用硬件描述语言来建模,软件用编程语言来编写,使用指令集仿真器和事件驱动逻辑仿真器分别完成对软硬件的仿真,两个仿真过程使用不同的进程并行进行,并通过进程间通信(IPC)实现两个仿真器之间的信息交互。This paper presents a hardware- software co- verification environment for SOC design, which is based on Instruction Set Simulator （ISS） and hardware simulator. In our environment, the hardware is described in a hardware description language and the software is written in a programming language, using ISS and event - driven hardware simulator simulate the software and the hardware, treat the hardware and software component as separate communication process, and using Inter Process Communication （IPC） build the communication between the software and the hardware simulator.

关 键 词：指令级仿真器 协同验证 进程间通信 套接字 

分 类 号：TP337[自动化与计算机技术—计算机系统结构]