边界扫描测试的软件实现  

Software Implementation of Boundary Scan Test

作　　者：张甜[1] 王祖强[1] 蔡棽 

机构地区：[1]山东大学信息科学与工程学院,济南250100

出　　处：《计算机工程》2007年第7期220-221,271,共3页Computer Engineering

摘　　要：随着芯片集成度和印刷电路板复杂度的不断提高,边界扫描测试技术在芯片故障检测中的应用越来越广泛。该文在分析IEEE JTAG标准和并口标准的基础上,设计开发了边界扫描测试软件。引入Access为后台数据库,实现了多种芯片的故障检测功能;介绍了边界扫描测试的基本原理和结构;讲述了BST软件设计中精确时钟控制、管脚查找、显示管脚波形等设计方法。以Altera的ep1c6q240器件为例,介绍了整个边界扫描测试过程。With the continual improvement of the chip＇s integration level and complexity of print circuit board, the application of boundary scan test technology becomes wider and wider in testing ICs. This paper analyzes the standard of JTAG and parallel port, and develops BST software. By selecting Access as the database platform, the software implements the IC testing of many kinds of chips conveniently. It introduces the working principle and architecture of BST. Three design methods （precise clock control, lookup pins and pins＇ wave display） are recommended. It presents eplc6q240 of Altera as an example to illuminate the flow of BST.

关 键 词：边界扫描测试 JTAG IEEE1149.1 并口 

分 类 号：TP311.52[自动化与计算机技术—计算机软件与理论]