SystemC在UART的IP软核设计中的应用  

Research on SystemC Application in UART IP Soft Core Design

作　　者：董玲[1] 陶建中[1] 张松[1] 黄越[1] 

机构地区：[1]江南大学信息工程学院,江苏无锡214122

出　　处：《江南大学学报（自然科学版）》2007年第2期208-211,共4页Joural of Jiangnan University (Natural Science Edition)　

摘　　要：在IP软核的设计过程中,可以利用SystemC行为模型描述特点代替传统HDL语言,建立行为模型和验证平台.以一个通用异步收发器的IP核设计为例,详细讨论整个IP软核的设计流程,重点分析了行为模块和验证模块的设计.结果表明,SystemC对于提高代码效率和IP开发速度有着重要作用.Since systemC language was good at behavior description, design method of behavior models and testbenchs using systemC instead of HDL in IP soft core design were introduced in this paper. Furthermore, an UART core design example was used to show the IP soft core design flow, in which design of behavior model and testbench were emphasized. The results showed that systemC had played an important role in improving code efficiency and IP developing speed.

关 键 词：IP核 通用异步收发器 SYSTEMC 验证平台 

分 类 号：TN402[电子电信—微电子学与固体电子学]