基于应变Si/SiGe的CMOS电特性模拟研究  

Simulation Study of Electrical Properties of CMOS Based on Strained Si/SiGe

作　　者：舒斌[1] 张鹤鸣[1] 任冬玲[1] 王伟[1] 

机构地区：[1]西安电子科技大学微电子学院宽禁带半导体材料与器件教育部重点实验室,西安710071

出　　处：《半导体技术》2007年第5期397-401,共5页Semiconductor Technology

基　　金：国家重点预研基金资助项目(51408061104DZ01)

摘　　要：提出了一种应变Si/SiGe异质结CMOS结构,采用张应变Si作n-MOSFET沟道,压应变SiGe作p-MOSFET沟道,n-MOSFET与p-MOSFET采用垂直层叠结构,二者共用一个多晶SiGe栅电极。分析了该结构的电学特性与器件的几何结构参数和材料物理参数的关系,而且还给出了这种器件结构作为反相器的一个应用,模拟了其传输特性。结果表明所设计的垂直层叠共栅结构应变Si/SiGe HCMOS结构合理、器件性能提高。A strained Si/SiGe HCMOS structure was presented, in which tensile strained Si was used in n-MOSFET, and compressive strained SiGe was used in p-MOSFET, moreover, n-MOSFET and p-MOSFET were stacked vertically with a common SiGe gate in this structure. The relationship between electronic properties and geometric and material parameters was analyzed. The application of the device structure as an inverter was given, and its transportation character was simulated. The simulation results indicate that this structure of strained Si/SiGe HCMOS with vertical stack and a common gate is appropriate, and the performance is improved.

关 键 词：异质结互补金属氧化物半导体场效应晶体管 应变SI 应变SiGe 垂直层叠 

分 类 号：TN303[电子电信—物理电子学] TN386.1