VHDL设计课程教学改革实践  

Practice of Teaching Reform for the VHDL Design

作　　者：朱奕丹[1] 

机构地区：[1]集美大学信息工程学院,福建厦门361021

出　　处：《电气电子教学学报》2007年第2期22-23,共2页Journal of Electrical and Electronic Education

摘　　要：“VHDL设计”作为信息类专业近年来新开出的一门重要的专业选修课,相对于传统专业课程而言具有内容新、发展快、应用性强等显著特点。如何顺应新形式的要求,针对课程理论与实践方面的教学内容、教学方法、教学手段进行改革,努力提高课程教学质量是任课教师需要认真思考并在实践中不断探索的。本文结合多轮的课程教学实践,介绍了“VHDL设计”课程教学改革的若干做法。VHDL Designs which is set up in recent years is an important specialty course of the information engineering institute. Compared to the traditional curriculum, this new course has some advantages such as new content, fast development and wide application. How to adapt the new form to reform the teaching contents, teaching methods and teaching means is important to the teachers to improve the teaching quality. This paper introduces some teaching reform through the practice of VHDL Designs these years.

关 键 词：新形式VHDL 设计 教学改革 

分 类 号：G471[文化科学—教育学]