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作 者:Mao Xiaojian Yang Huazhong Wang Hui
机构地区:[1]Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
出 处:《Journal of Electronics(China)》2007年第3期374-379,共6页电子科学学刊(英文版)
基 金:the National Natural Science Foundation of China (No. 60025101, No.90207001, and No. 90307016).
摘 要:This paper investigates the design of digital Sigma-Delta Modulator (SDM) for fractional-N frequency synthesizer. Characteristics of SDMs are compared through theory analysis and simulation. The curve of maximum-loop-bandwidth vs. maximum-phase-noise is suggested to be a new criterion to the performance of SDM,which greatly helps designers to select an appropriate SDM structure to meet their real application requirements and to reduce the cost as low as possible. A low-spur 3-order Mul-tistage Noise Shaping (MASH)-1-1-1 SDM using three 2-bit first-order cascaded modulators is proposed,which balances the requirements of tone-free and maximum operation frequency.This paper investigates the design of digital Sigma-Delta Modulator (SDM) for fractional-N frequency synthesizer. Characteristics of SDMs are compared through theory analysis and simulation. The curve of maximum-loop-bandwidth vs. maximum-phase-noise is suggested to be a new criterion to the performance of SDM, which greatly helps designers to select an appropriate SDM structure to meet their real application requirements and to reduce the cost as low as possible. A low-spur 3-order Multistage Noise Shaping (MASH)-1-1-1 SDM using three 2-bit first-order cascaded modulators is proposed, which balances the requirements of tone-free and maximum operation frequency.
关 键 词:FRACTIONAL-N Frequency synthesizer Phase Locked Loop (PLL) Sigma-Delta Modulator(SDM)
分 类 号:TN911.8[电子电信—通信与信息系统]
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