FRACTIONAL-N

作品数:8被引量:4H指数:1
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相关领域:电子电信更多>>
相关作者:杨丰林张利张世林毛陆虹陈弘毅更多>>
相关机构:复旦大学天津大学清华大学中国华大集成电路设计中心更多>>
相关期刊:《Journal of Semiconductors》《Journal of Electronics(China)》《高技术通讯》《Chinese Journal of Electronics》更多>>
相关基金:国家自然科学基金国家高技术研究发展计划国家重点基础研究发展计划“上海-应用材料研究与发展”基金更多>>
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A fractional-N frequency divider for multi-standard wireless transceiver fabricated in 0.18μm CMOS process被引量:2
《Journal of Semiconductors》2017年第12期73-80,共8页Jiafeng Wangt Xiangning Fan Xiaoyang Shi Zhigong Wang 
With the rapid evolution of wireless communication technology, integrating various communication modes in a mobile terminal has become the popular trend. Because of this, multi-standard wireless technology is one of t...
关键词:MULTI-STANDARD frequency synthesizer fractional-N frequency divider phase switching △-∑ modulat-or 
A wideband frequency synthesizer with VCO and AFC co-design for fast calibration
《Journal of Semiconductors》2013年第1期107-112,共6页楼立恒 孙玲玲 高海军 詹海挺 
Project supported by the Major State Basic Research Development Program of China (No.2010CB327403);the National Natural Science Foundation of China (No.61102027);the Natural Science Foundation of Zhejiang Province,China (No.Y1110991)
A wideband fractional-N frequency synthesizer is implemented in a 65 nm CMOS process.It employs a wideband LC voltage-controlled oscillator(VCO) with optimized VCO gain(KVCO/and a sub-band step to improve automatic...
关键词:frequency synthesizer FRACTIONAL-N AFC KVCO BANDWIDTH CMOS 
一种7-8双模预分频△∑Fractional-N频率综合器①被引量:1
《高技术通讯》2012年第12期1286-1291,共6页王文波 毛陆虹 肖新东 谢生 张世林 
863计划(2008AA04A102)资助项目.
设计了一种应用于超高频射频识别(UHFRFID)阅读器的A∑Fractional-N频率综合器。该频率综合器采用开关电容阵列结构实现了调谐范围为750—950MHz的压控振荡器,使用电流模式逻辑(CML)结构D触发器实现了7—8双模预分频,频率精度设计...
关键词:超高频射频识别(UHF RFID)阅读器 频率综合器 压控振荡器(VCO) 7—8 双模预分频 △∑调制器 
COMPARISON OF SIGMA-DELTA MODULATOR FOR FRACTIONAL-N PLL FREQUENCY SYNTHESIZER
《Journal of Electronics(China)》2007年第3期374-379,共6页Mao Xiaojian Yang Huazhong Wang Hui 
the National Natural Science Foundation of China (No. 60025101, No.90207001, and No. 90307016).
This paper investigates the design of digital Sigma-Delta Modulator (SDM) for fractional-N frequency synthesizer. Characteristics of SDMs are compared through theory analysis and simulation. The curve of maximum-loop-...
关键词:FRACTIONAL-N Frequency synthesizer Phase Locked Loop (PLL) Sigma-Delta Modulator(SDM) 
Tone Free Sigma-Delta Modulator with Feedback Dithering for RF Fractional-N Frequency Synthesizer
《Chinese Journal of Electronics》2007年第1期59-62,共4页LIU Junhua LIAO Huailin ZHANG Guoyan HUANG Ru ZHANG Xing 
A new Sigma-delta modulator (SDM) for Radio frequency (RF) fractional-N frequency synthesizer is proposed with a new dither generating method and a dither feedback loop. In this structure, the output of the conven...
关键词:Sigma-delta modulator (SDM) Fre- quency synthesizer DITHER Feedback. 
A CMOS Low Power Fully Differential Sigma-Delta Frequency Synthesizer for 2Mb/s GMSK Modulation被引量:1
《Journal of Semiconductors》2006年第12期2106-2111,共6页张利 池保勇 姚金科 王志华 陈弘毅 
国家重点基础研究发展计划(批准号:G2000036508);国家自然科学基金(批准号:90407006,60475018)资助项目~~
A CMOS fully-differential 2.4GHz ∑-△ frequency synthesizer for Gaussian minimum shift keying (GMSK)modulation is presented. A pre-compensation fractional-N phase-locked loop(PLL)is adopted in the modulator.The t...
关键词:CMOS FRACTIONAL-N Gaussian minimum shift keying phase-locked loop~ sigma-delta 
Analysis and Design of a ΔΣ Modulator for Fractional-N Frequency Synthesis
《Journal of Semiconductors》2006年第1期41-46,共6页张伟超 许俊 郑增钰 任俊彦 
上海应用材料研究与发展基金资助项目(批准号:0302)~~
This paper presents the design considerations and implementation of a novel topology digital multistage-noise-shaping (MASH) delta-sigma modulator suitable for fractional-N phase-locked-loop (PLL) frequency synthe...
关键词:△∑ modulator fractional-N frequency synthesis MASH architecture 
A Fractional-N CMOS DPLL with Self-Calibration
《Journal of Semiconductors》2005年第11期2085-2091,共7页刘素娟 杨维明 陈建新 蔡黎明 徐东升 
国家高技术研究发展计划资助项目(批准号:2002AA1Z1290)~~
A digital phase-locked loop (DPLL) based on a new digital phase-frequency detector is presented. The self-calibration technique is employed to acquire wide lock range,low jitter, and fast acquisition. The DPLL works...
关键词:digital phase-locked loop phase-frequency detector SELF-CALIBRATION voltage controlled oscillator FRACTIONAL-N 
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