一种集成“龙芯1号”IP核的SoC的体系结构  

Architecture of SoC integrated with GODSON-1 IP core

作　　者：陈杰[1] 章军[1] 

机构地区：[1]中国科学院计算技术研究所

出　　处：《计算机工程与应用》2007年第19期111-114,共4页Computer Engineering and Applications

基　　金：江苏省科技成果转化专项资金项目(No.BA2004029)

摘　　要：提出了一种集成“龙芯1号”RISC CPU以及其它12种IP核的SoC的体系结构,并对其性能进行了分析。此外,还将该SoC与目前市场上存在的同类SoC的主要特征进行了对比,该SoC的设计目标定位在低成本、低功耗、高稳定性与安全性的32位嵌入式应用。The architecture of a SoC integrated GODSON-1 RISC CPU with other twelve IP cores is presented and its performance is analyzed in this paper.In addition,the main features of this SoC are compared with those of the same type chips in the market.In summary,the design goal of this SoC is aiming at 32-bit embedded applications which are concerned with low cost, low power consumption,high stability and security.

关 键 词：片上系统 龙芯1号 IP核 性能分析 

分 类 号：TP33[自动化与计算机技术—计算机系统结构]