宽摆幅高速高精度级间增益放大器的优化设计  

Optimization and Design of Wide-Output-Voltage-Swing High-Speed High-Accuracy Inter-Stage Amplifier

作　　者：赵毅强[1] 刘钢[1] 高静[1] 

机构地区：[1]天津大学电子信息工程学院,天津300072

出　　处：《天津大学学报》2007年第4期479-483,共5页Journal of Tianjin University(Science and Technology)

基　　金：天津科技重点攻关资助项目(F305035)

摘　　要：为了满足1024×1024像素焦平面红外探测器高速采集系统中模数转换器的需求,采用0.35μm CMOS工艺技术,设计了12-bit、40-Msample/s的流水线模数转换器第一级的级间增益放大器.在传统两级运放的基础上,采用交叉耦合的AB类输出级和共源共栅补偿,提高了输出摆幅和带宽,并通过数学工具对功耗进行了优化.在电路设计基础上完成了版图设计与后仿真,达到直流增益92 dB、输出摆幅4 V、静态功耗35 mW、反馈系数1/4的情况下带宽达到170 MHz、相位裕度69°等指标,满足系统设计需求.To meet the design requirements of analog-to-digital converter（ADC） of high-speed sampling system in 1 024 × 1 024 pixels focal plane array infrared tester, with 0.35 μm CMOS technology, first inter-stage amplifier of 12-bit 40-Msample/s pipelined ADC was designed. Based on traditional two-stage amplifier, crosscoupled class AB output stage and cascode compensation were adopted to improve output voltage swing and bandwidth. Power dissipation was optimized with mathematic tools. On the basis of circuit design, layout design and post-simulation were completed. And the results of simulation are： 92 dB DC gain, 4 V output voltage swing, 35 mW power dissipation,170 MHz bandwidth and 69° phase margin with feedback factor of 1/4. The performance can meet the system design requirements.

关 键 词：运算跨导放大器 AB类输出级 共源共栅补偿 

分 类 号：TN721.1[电子电信—电路与系统]