一种基于CMOS工艺的差分低噪声放大器设计  

The Design of Differential Low Noise Amplifier Based on CMOS Process

作　　者：马涛[1] 柴常春[1] 康英[1] 杨银堂[1] 

机构地区：[1]西安电子科技大学微电子研究所,陕西西安710071

出　　处：《北京电子科技学院学报》2007年第2期36-38,48,共4页Journal of Beijing Electronic Science And Technology Institute

摘　　要：研究低噪声放大器(LNA)的结构以及性能参数,采用电路仿真软件ADS(Advanced Design System)设计一个基于台积电(TSMC)0.25μmCMOS工艺的2.5GHz差分低噪声放大器。通过在输出端增加共源极的优化方法,对其进行电路结构的改进,得到一个高性能的实用低噪声放大器,并利用版图软件CadenceVirtuoso对其实现版图设计。The paper discussed the structure and characteristics of the low noise amplifier（LNA）. A 2.SGHz differential low noise amplifier was designed and simulated in TSMC 0.25μm CMOS process based on the software of ADS （Advanced Design System）. Adding two common-source stages to each output node to improve and optimize the LNA will achieve a high-performance practical LNA and design a layout of the software of Cadence Virtuoso.

关 键 词：低噪声放大器 功率增益 噪声系数 线性度 

分 类 号：TN722.3[电子电信—电路与系统]