基于CPLD的PSK系统设计  

The Design of PSK System Based on CPLD

作　　者：沈琰[1] 李龙江[1] 

机构地区：[1]山东省东营职业学院工业工程系,山东省东营市257091

出　　处：《微计算机信息》2007年第04Z期244-245,243,共3页Control & Automation

摘　　要：本论文主要讨论和仿真了基于CPLD的PSK系统单元设计,在阐述调制解调系统的基本原理与设计方法的同时,又详细地介绍了系统的总体电路框图及各个模块的具体软硬件实现。作者以VHDL作为设计的硬件描述语言,在Altera公司的Maxplus2开发平台上进行了程序设计及波形仿真。“自顶向下”是本设计的主要特色,所有程序都通过了以EPM7128SLC84-7作为主芯片的CPLD实验开发板的硬件调试。　This thesis primarily focused on the modulation and demodulation system based on CPLD,and also expatiated on the basic principle and design method of modulation and demodulation. The overall circuit frame of system and achieving both in hardware and software of each module in details are the emphases of this thesis. The author utilized VHDL to be the hardware describing language of design and has been waveform simulated on Maxplus2 developed by Altera. “TOP-TO-DOWN”is the main feature of this design. The whole program has passed the hardware debugging on CPLD experiment exploitation board which takes EPM7128SLC84-7 to be the main chip.

关 键 词：调制解调 CPLD VHDL 

分 类 号：TP309[自动化与计算机技术—计算机系统结构]